47 lines
2.9 KiB
C
47 lines
2.9 KiB
C
/*==============================================================================
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File: PIC16F1459-config.c
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Date: March 1, 2022
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UBMP4.1 (PIC16F1459) configuration bit settings
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Processor configuration bits determine processor operating characteristics as
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well as processor-specific features. Refer to the processor datasheet for
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details on specific configuration bit settings.
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The settings below were generated by the Configuration Bits tool in MPLAB X,
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accessed under: Window menu -> Target Memory Views -> Configuration Bits
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==============================================================================*/
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// TODO - Verify or modify configuration bits using the Configuration Bits tool.
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// PIC16F1459 Configuration Bit settings generated for UBMP4 by MPLABX.
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// These settings must exactly match those in the bootloader program if a
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// bootloader will be used.
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// CONFIG1
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#pragma config FOSC = INTOSC // Oscillator Selection Bits (INTOSC oscillator: I/O function on CLKIN pin)
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#pragma config WDTE = SWDTEN // Watchdog Timer Enable (WDT controlled by the SWDTEN bit in the WDTCON register)
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#pragma config PWRTE = ON // Power-up Timer Enable (PWRT enabled)
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#pragma config MCLRE = OFF // MCLR Pin Function Select (MCLR/VPP pin function is digital input)
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#pragma config CP = OFF // Flash Program Memory Code Protection (Program memory code protection is disabled)
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#pragma config BOREN = SBODEN // Brown-out Reset Enable (Brown-out Reset controlled by the SBOREN bit in the BORCON register)
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#pragma config CLKOUTEN = OFF // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)
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#pragma config IESO = OFF // Internal/External Switchover Mode (Internal/External Switchover Mode is disabled)
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#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled)
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// CONFIG2
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#pragma config WRT = OFF // Flash Memory Self-Write Protection (Write protection off)
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#pragma config CPUDIV = NOCLKDIV// CPU System Clock Selection Bit (NO CPU system divide)
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#pragma config USBLSCLK = 48MHz // USB Low SPeed Clock Selection bit (System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.)
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#pragma config PLLMULT = 3x // PLL Multipler Selection Bit (3x Output Frequency Selected)
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#pragma config PLLEN = ENABLED // PLL Enable Bit (3x or 4x PLL Enabled)
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#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)
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#pragma config BORV = HI // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), high trip point selected.)
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#pragma config LPBOR = OFF // Low-Power Brown Out Reset (Low-Power BOR is disabled)
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#pragma config LVP = OFF // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming)
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// #pragma config statements should precede project file includes.
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// Use project enums instead of #define for ON and OFF.
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#include <xc.h>
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